In the field of electronic and computer devices, there is a need for converting one power level to another power level to enable the operation of various systems. The power level required for the various electronic systems is quite commonly different from a power level provided to the electronic device. Also, several different power levels may be required to power the various systems of an electronic device.
Also, the same electronic device typically includes systems requiring several different power levels. Thus, in many electronic devices, there is a need for one or more power level shifters.
Power level shifters generally include a power module (also referred to herein as a power converter) and several associated systems (inductor's, capacitors, and the like). Power level shifters can consist of Field Effect Transistors (FETs) and controller ICs. One such arrangement is shown in FIG. 1(a)
In the depicted prior art convertor 10 a low side field effect transistor (LS FET) 11 is arranged on a lead frame 12. Also, a high side field effect transistor (HS FET) 13 and an associated controller 14 arranged on the lead frame 12. A pair of conductive clips (C1, C2) conductively interconnect the HS FET with the LS FET to form a switching connection. A problem with this arrangement is that the pair of clips are required to appropriately connect the LS FET 11, the HS FET 13, and the controller 14. A fair amount of time and effort is required to position, align, and attach and otherwise connect the clips (C1, C2) with the FET's of the package 10.
Thus, the number of components and the alignment difficulties associated with them results in increased fabrication costs and higher failure rates in the packages produced. Additionally, the layout of FIG. 1(a) presents a relatively large surface area due its planar die arrangement. This large surface area is becoming increasingly problematic when faced with the decreasing size of consumer electronic devices. Accordingly, a need for devices (including power convertors) having a smaller “footprint” is desirable. The depicted prior art converter package 10 has a very large surface area. This takes up valuable real estate on various electronic substrates. So both the large footprint of prior art device and the need for two clips are disadvantages of the prior art.
Accordingly, as explained in this patent, a power converter package having a more compact structure with a reduced foot print, a simplified manufacturing structure, and improved fabrication processes is desirable. It is one of the objects of this patent to provide such a package and modes for its manufacture.